AN79973 - PSoC3 and PSoC5 CapSense CSD - IEC 60730 Class B Safety Software...
AN79973 details the self-check tests and their implementation details to match the IEC60730 standards that ensure reliable and safe operation of CapSense CSD component in PSoC 3 and PSoC 5 devices....
View ArticleAN59389 - Host Sourced Serial Programming for CY8C20xx6A, CY8C20xx6AS,...
Introduction Cypress’s PSoC microcontrollers are easy-to-use, flexible, and have a cost-effective mix of reprogrammable analog and digital resources. These features provide many opportunities for...
View ArticleAN48303 - CapSense® Express™ - Migrating from Firmware Rev 0x15 to Rev 0x1B
Introduction CapSense® Express™ supports up to 10 I/Os that can be configured as capacitive sensing inputs or digital GPIOs. These configurable I/Os are used for operations, such as interrupt, wakeup...
View ArticleAN072 - Driving Teradyne FR4 and GETEK Backplanes with the Hotlink II™...
This application note gives an overview of HOTLink II™ serial transmission lines and the causes and types of jitter. This document also explains how the HOTLink II transceiver can transmit and receive...
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AN50989 - PSoC® 1 - USB To SPI Bridge using PSoC 1
The discussion includes a brief introduction to the PSoC USB subsystem, the USBFS user module, USB device descriptors and the PSoC SPI user module. It also covers the USB to SPI conversion process...
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AN43380 - HSB Operation in nvSRAMs
Introduction Cypress’s nonvolatile synchronous random access memory (nvSRAM) combines the best features of SRAM and EEPROM and makes it the fastest and the most reliable nonvolatile memory. Every bit...
View ArticleAN42499 - Using and Troubleshooting the KEIL™ Debugger Environment
This guide covers the serial cable connection from PC to SIO-1/0, the monitor code download, and required project settings. Additionally, the guidelines to start and stop a debug session, set...
View ArticleAN084 - SD-SDI and HD-SDI Checkfield Testing on Hotlink II™ Transceivers for...
The HOTLink II family of physical layer (PHY) devices is a point-to-point or point-to-multipoint communications building block that provides serialization, deserialization, optional 8B/10B...
View ArticleAN041 - EZ Loader Custom USB Firmware Loader Driver
A typical EZ-USB-based device has only enough nonvolatile storage in an EEPROM to store a unique Vendor ID (VID) and Product ID (PID). This VID/PID combination is bound to a specific device driver on...
View ArticleAN49079 - CapSense® PLUS: DynamicallyConfiguring CapSense
Introduction CapSense is a widely accepted technology that is used to replace conventional mechanical switches. Creating an application by adding user modules like PWMs or an ADC to CapSense device...
View ArticleAN4047 - Crosstalk Analysis of the Quad Independent Channel HOTLink II™ Device
The HOTLink II™ family of physical layer (PHY) devices is a point-to-point or point-to-multipoint communications building block that provides serialization, deserialization, optional 8B/10B...
View ArticleAN81828 - PSoC® 1 – IEC 60730 Class B Safety Software Library
.antab td { text-align:center; vertical-align:middle; } Introduction Today, the majority of automatic electronic controls for home appliance products use single-chip microcontrollers. Manufacturers...
View ArticleAN89610 - PSoC® 4 and PSoC 5LP ARM Cortex Code Optimization
Introduction The ARM Cortex CPUs in the PSoC 4 and PSoC 5LP devices are designed to implement C code in a highly efficient manner. Thus, most of the time, you will not need any special knowledge to do...
View ArticleAN66806 - Getting Started with EZ-USB® FX2LP™ GPIF
This document introduces the GPIF unit and its graphical design tool called GPIF Designer by creating a simple design that divides the GPIF clock by 2, 4, and 7. Only three lines of C code are...
View ArticleAN2397 - CapSense® Data Viewing Tools
During the CapSense® design process, you will need to monitor CapSense sensor data, such as raw counts, baseline, and difference counts, for tuning and debugging. This document helps you to select the...
View ArticleAN61290 - PSoC® 3 and PSoC 5LP Hardware Design Considerations
Introduction PSoC® 3 and PSoC 5LP devices provide tremendous power and flexibility for analog and digital applications, beyond what traditional MCUs offer. However, this flexibility raises new...
View ArticleAN60630 - PSoC® 3 - 8051 Code and Memory Optimization
This can result in smaller code size in flash memory, as well as faster code. The efficiency gains can be realized without writing any 8051 assembler code. Instead, keywords for the Keil 8051 C...
View ArticleAN66627 - PSoC® 3 and PSoC 5LP Intelligent Fan Controller
The Fan Controller Component, available in PSoC Creator™, helps manage the fans in a variety of configurations. This application note also shows how to combine fan control and temperature sensing to...
View ArticleAN1160 - Hotlink® CY7B923/CY7B933 to Hotlink II™ Migration
HOTLink® is a point-to-point or point-to-multipoint communications building block allowing the transfer of data over high-speed serial links (fiber, coax, twisted pair, and pcb trace). HOTLink II™...
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AN44517 - Design Recommendation for Battery-Backed SRAMs Using Cypress MoBL®...
Battery Backed SRAM's (BBSRAM's), also called NVRAM's by system designers, are an important part of applications that require any kind of data backup in the event of a power failure. The block diagram...
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