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AN2155 - PSoC® 1/3/5 - EMI Design Considerations for PSoC
AN2155 discusses designing PSoC mixed-signal array-based systems for compliance with EMC standards. This results in easier qualification of new designs and more robust low-cost system design. Every...
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AN69091 - Edge Align Feature of CY254xx and MoBL® Clocks
AN69091 discusses the Edge Align feature in Cypress’s programmable clock family, CY254x, CY254xx, and MoBL® clocks.Today’s technology products operate at gigahertz (GHz) frequency and therefore need...
View ArticleAN2226 - PSoC® 1 - Using Correlated Double Sampling to Reduce Offset, Drift,...
AN2226 presents low noise signal processing in psoc® 1 through the use of correlated double sampling (cds) to reduce errors due to offset, drift, and low frequency noise. an analog front end for a...
View ArticleAN58717 - PLC - LED Lighting Control using Powerline Communication
This application note describes LED control using Powerline Communication. It also discusses the Auto Node Discovery algorithm, which is a part of LED control. Cypress provides a robust solution to...
View ArticleAN89878 - WUSB-NX Hardware Design Guidelines
AN89878 provides the hardware design guidelines for Cypress WUSB-NX (WirelessUSB™ NX) transceiver. It provides details to create schematics and PCB layouts for a WUSB-NX application. This note also...
View ArticleAN88889 - Mitigating Single-Event Upsets Using Cypress’s 65-nm Asynchronous SRAM
This application note introduces the Error Correcting Code (ECC) feature of Cypress’ 65-nm 16-Mbit Asynchronous SRAMs. It explains major causes of single-event upsets in systems and how they are...
View ArticleAN89371 - Power Saving With Cypress’s 65-nm Asynchronous PowerSnooze™ SRAM
This application note explains the PowerSnoozeTM feature of Cypress’ 65-nm Asynchronous Fast SRAM devices (CY7S10xxG family). PowerSnooze allows the SRAM to enter into a low-power mode during long...
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AN78737 - PSoC® 1 - Temperature-Sensing Solution using a TMP05/TMP06 Digital...
AN78737 enables designers using the psoc 1 - cy8c28xxx family to quickly and easily interface with analog devices’ tmp05 or tmp06 digital temperature sensors. The application note describes the...
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AN75320 - Getting Started with PSoC® 1
AN75320 introduces you to PSoC® 1, an 8-bit processor with programmable digital and analog blocks that enable implementation of custom functions. This application note describes the PSoC 1...
View ArticleAN60630 - PSoC® 3 8051 Code and Memory Optimization
This can result in smaller code size in flash memory, as well as faster code. The efficiency gains can be realized without writing any 8051 assembler code. Instead, keywords for the Keil 8051 C...
View ArticleAN73854 - PSoC® 3, PSoC 4, and PSoC 5LP Introduction To Bootloaders
Introduction This application note gives an overview of bootloader fundamentals and design principles, and then shows how they are implemented for PSoC 3, PSoC 4, and PSoC 5LP in PSoC Creator projects.
View ArticleAN80248 - PSoC® 3, PSoC 5LP Improving the Accuracy of Internal Oscillators
Two components developed for this purpose greatly simplify the process of calibrating the ILO and IMO with respect to a reference time base. Introduction PSoC® 3 and PSoC 5LP (hereafter referred to as...
View ArticleAN81623 - PSoC® 3, PSoC 4, and PSoC 5LP Digital Design Best Practices
Introduction PSoC 3, PSoC 4, and PSoC 5LP have a powerful and flexible programmable digital peripheral system. In addition to a set of fixed function blocks (4 timers, I2C, USB, CAN), they offer as...
View ArticleAN82156 - PSoC® 3, PSoC 4, and PSoC 5LP Designing with UDB Datapaths
#antab td { text-align:center; vertical-align:middle; } Introduction PSoC 3, PSoC 4 and PSoC 5LP (hereafter referred to as "PSoC") support a wide variety of functions, called components. Many of these...
View ArticleAN77835 - PSoC® 3 to PSoC 5LP Migration Guide
Introduction The PSoC 3 and PSoC 5LP devices are designed for easy migration from PSoC 3 to PSoC 5LP. Although there are some differences such as the CPU cores, the programmable analog, programmable...
View ArticleAN89610 - PSoC® 4 and PSoC 5LP ARM Cortex Code Optimization
Introduction The ARM Cortex CPUs in the PSoC 4 and PSoC 5LP devices are designed to implement C code in a highly efficient manner. Thus, most of the time, you will not need any special knowledge to do...
View ArticleAN5073 - Guidelines for Selecting the Reference Clock Input of the HOTLink...
The purpose of this application note is to analyze one of the contributors of jitter in the serial output, namely the phase noise present in the reference source. The bit-rate clock that clocks the...
View ArticleAN060 - Frequently Asked Questions about the CYP(V)15G0403DXB Device
The following are Frequently Asked Questions (FAQs) by customers who are evaluating CYP(V)15G0403DXB devices. The CYP(V)15G0403DXB is a member of Cypress's High-Speed Frequency Agile HOTLink II™...
View ArticleAN5077 - Jitter Generation and Jitter Tolerance of Independent Channel...
This application note describes the jitter generation of the HOTLink II transmitter and the jitter tolerance of the HOTLink II receiver measured on independent channel HOTLink II devices.
View ArticleAN5076 - Guidelines for Selecting Reference Clock Input of the HOTLink II™...
The purpose of this application note is to analyze one of the contributors of jitter in the serial output, namely the phase noise present in the reference source. The bit-rate clock that clocks the...
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