Introduction
The nvSRAM architecture uses a one-to-one pairing of a nonvolatile bit and a fast SRAM bit in each memory cell. During normal operation, the IC behaves exactly as a standard fast asynchronous SRAM and is easy to interface with the microprocessor or microcontroller. When IC power is disrupted or lost, the event is detected and all the SRAM bits are saved into the nonvolatile part (within 8 ms) using the stored energy in a small capacitor (VCAP). This operation is called AutoStore and is described in more detail in the next section. When power is restored, data is automatically recalled from the nonvolatile part to SRAM on power restore and this operation is called Power-Up RECALL (Hardware RECALL).
